Oxygen Module for Structured Machine Code Programming

[Charles Pegge]

The ancestors of the x86 are the 4004 (4 bits) and the 8080 (8 bits). Devices of these ancient times often coded their instructions in octal since bytes were in short supply, they had to be used as efficiently as possible. This is the legacy we have today. The addressing byte consists of

Simplistically:

mod: 2 bits addressing mode
reg: 3 bits register1 (normally the destination)
r/m: 3 bits register2 (normally the source)

when mod=00 register2 hold the memory address
when mod=01 register2 holds the memory address + offset (next byte)
when mod=10 register2 holds the memory address + offset (next 4 bytes)
when mod=11 register2 is treated as the location of the data (reg to reg transfer)

Example: mov 32 bit
8b c1 ' mov eax,ecx ' going from right to left in Intel syntax
8b c8 ' mov ecx,eax
8b 01 ' mov eax, [ecx]
8b 41 08 ' mov eax [ecx+8]
8b 81 00 02 00 00 ' mov eax,[ecx+512]

But the x86 has elaborated on this scheme to extend the addressing modes (like irregular verbs in natural languages), so for some combinations its a bit more complicated.

[ErosOlmi]

Charles,

you are giving us poor mortal a lot of interesting knowledge is short but effective way that goes directly into our gray matter.
I can see some lights at the bottom of the tunnel.

A big thanks. This is all new to me.
Eros

[Charles Pegge]

Well this is good mental exercise - devising rules for the assembler.

To show how Intel stretch out their addressing modes:

if mod is 00 and r/m is 101 then it uses the offset as an absolute address:

useful example:
8b 05 #vv ' mov eax, [#vv] ' move contents of vv into eax

if mod is 00 01 or 10 and r.m is 04 then there is an extended address mode byte called a SIB which stands for Scale Index Base.

This enables the address to be derived from 2 registers, one of which is scaled. A sort of 2 dimensional array. It allows data in these arrays to be referenced in one go. For example:

8b 84 91 #vv ' mov eax,[ ecx + edx *4 + #vv ]

In this case the primary address byte 84 breaks down as follows

mod 10 for a 4 byte long offset (#vv)
reg 000 destination the eax register
r/m 100 a SIB byte follows

the SIB byte 91 breaks down as follows

Scale 10 signifying index * 4 bytes
Index 010 the index is the value in edx
Base 001 the base is the value in ecx

The offset, our absolute address to the start of #vv is then added to these.

There are a few more complications to contend with but this is the most elaborate addressing mode available.

[Petr Schreiber]

Hi Charles,

thanks again, learning bit by bit works very good, at least for me.
So here I attach cover of book you might not even now that you write here / will write ;D


Thanks a lot,
Petr

[kryton9]

As all things in this thread, awesome stuff Petr and well deserved for Charles!

[Charles Pegge]

Thanks for your comments and the book! If its for kids it will be a scrap book. Coding these rules into an Assembler is hard work. Attempting a regular block structure was pretty hopeless so I have resorted to the good old fashioned GOTO. It reduces deep nesting and makes the code much cleaner. If all goes well I should have a small kernel of the instruction set useable in a few days. It will sit in its own layer above oxygen, which will do all the linking.